Molded packages have the potential to provide less expensive enclosures for semiconductor devices, to be readily prepared using automated high volume manufacturing techniques, and to provide a high degree of thermal dissipation and protection against the possibility of contaminants entering the package through microcracks along terminal leads. However, current molded semiconductor packages do not satisfactorily achieve these advantages.
Ellenberger et al., U.S. Pat. No. 4,925,024, discloses alternating layers of conducting and insulating materials to form a package with a sealed, internal cavity for housing an integrated circuit. Drawbacks of this design include the use of a ceramic layer between the semiconductor device and the metalized base. Vias, or metallic leads extending through this ceramic layer, provide a lesser level of thermal dissipation than having the device mounted directly on a metallic base. Additionally, the package's multiple conducting layer and insulating layer interfaces increase the risk of the package developing microcracks along these boundaries as a result of thermal fluctuations. Furthermore, such a design necessarily requires more complicated assembly due to the multiple layers.
A similar package is disclosed in Reifel et al., U.S. Pat. No 4,931,906. Even though the insulating and conducting materials are chosen to have similar coefficients of thermal expansion, the multiplicity of layer interfaces still poses a higher risk of cracking than a design with only one conductor to insulator boundary. Since the center of this package is hollow, a crack along one of its broad conducting tabs can allow a contaminant to travel the short distance to the cavity and the semiconductor device.
Van Dyk Soerewyn, U.S. Pat. No. 4,538,168, discloses a package for a high power semiconductor device comprising an extruded thermally and electrically conducting housing carrying one or more semiconductor die assemblies in a molded encapsulant. Whereas this design minimizes the number of insulator to conductor interfaces, its manufacture is still involved; the housing must be extruded to the designated shape, encapsulant anchoring flanges and/or grooves must be formed, and the housing must be cut to the appropriate size. After installation of the semiconductor device into the formed housing, the encapsulant is inserted.
An easily manufactured design which locks a semiconductor device encapsulant to a metallic base is lacking in the current art.